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Via Honoris

Via Honoris is a full-stack implementation of a computing system, spanning from the RTL description of the hardware all the way up to the system software required to manage it. The goal is to consolidate the computer architecture, hardware design, and programming knowledge gained throughout my university journey by applying it to a practical end-to-end project.

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The stack includes:

  • Virtus-RV: A 5-stage RISC-V CPU implemented in SystemVerilog.
  • Operating System: Initial port of FreeRTOS, followed by a custom OS (coming soon).
  • Applications: Demo programs for system-level testing (coming soon).

Developed as part of the Honors Academy at TU Eindhoven.